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Preliminary Datasheet
RJK0230DPA
Silicon N Channel Power MOS FET with Schottky Barrier Diode
High Speed Power Switching
R07DS0541EJ0110
Rev.1.10
Sep 12, 2011
Features
?
?
?
?
?
Low on-resistance
Capable of 4.5 V gate drive
High density mounting
Pb-free
Halogen-free
Outline
RENESAS Package code: PWSN0008DD-B
(Package name: WPAK-D(3))
2
3
4
9
D1 D1 D1
S1/D2
5
6
7
8
5 6 7 8
1
G1
8
G2
9
1, 8 Gate
2, 3, 4, 9 Drain
4 3 2 1
5, 6, 7, 9 Source
4
3
2
1
S2 S2 S2
5 6 7
(Bottom View)
MOS1
MOS2 and
Schottky Barrier Diode
Absolute Maximum Ratings
(Ta = 25°C)
Ratings
I D(pulse)
Item
Drain to source voltage
Gate to source voltage
Drain current
Drain peak current
Reverse drain current
Avalanche current
Avalanche energy
Channel dissipation
Channel temperature
Storage temperature
Symbol
V DSS
V GSS
I D
Note1
I DR
I AP Note 2
E AR Note 2
Pch Note3
Tch
Tstg
MOS1
25
±20
20
80
20
12
18
15
150
–55 to +150
MOS2
25
±12
50
200
50
23
66
35
150
–55 to +150
Unit
V
V
A
A
A
A
mJ
W
° C
° C
Notes: 1. PW ? 10 ? s, duty cycle ? 1%
2. Value at Tch = 25 ? C, Rg ? 50 ??
3. Tc=25 ? C
R07DS0541EJ0110 Rev.1.10
Sep 12, 2011
Page 1 of 10
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